1. Field of the Invention
The present invention relate to a semiconductor device, in particular a semiconductor device having a bipolar transistor and a gate-insulated transistor and/or a photodiode on a same substrate, and a process for producing said semiconductor device.
2. Related Background Art
There are already developed various composite IC's including both bipolar transistors and MOS transistors, but the transistors of such composite IC's are not satisfactory with respect to the dimension, electrical properties and reliability in comparison with those of simple IC's.
For improving the bipolar transistor in such composite IC, there is proposed, in the Japanese Patent Laid-open 222556/1983 to form the emitter domain by an impurity diffusion from a polysilicon layer, thereby obtaining a shallow junction by self alignment.
On the other hand, miniaturized MOS transistors show certain drawbacks such as hot electron effect or short channel effect. LDD structure or offset gate structure with side walls is proposed as a countermeasure against such defects.
However such improvement is intended for either of the transistors, and the separate formation of these transistors will not only result in an increase in the number of process steps but also give rise to an undesirable mutual effect on both transistors.
There is also proposed a composite photosensor IC containing a bipolar transistor and a photodiode. Such photosensor enables direct processing of the output of the photodiode. FIG. 1A shows an example of such IC, and FIG. 1B is a cross-sectional view along a line I--I in FIG. 1A.
Referring to FIGS. 1A and 1B, a photodiode PD and a bipolar transistor BI are formed on a P-semiconductor substrate 1, across a P.sup.+ -separating area 4. More specifically, on N.sup.+ -embedded layers 2, there are formed N-epitaxial layers 3 for constituting the N-domain of the photodiode and the collector domain of the transistor. There are further formed a P-domain 5 of the photodiode and a P-base domain 6 of the transistor on N.sup.+ embedded layer 2. Furthermore, in the P-base domain 6 there is formed an N.sup.+ -emitter domain 7, and an N.sup.+ -layer 8 is simultaneously formed as an ohmic contact layer for the N-epitaxial layer 3.
The ohmic contact layer 8 does not reach the embedded layer 2 as shown in the drawing in one case of the configuration. While, in another case of the configuration not shown in the drawings, the layer 8 is directly connected to the embedded layer 2.
Such a photosensor is not affected by light because the bipolar transistor BI is provided thereon with an unrepresented light shield member, so that the parasitic transistor effect can be disregarded if the P-base domain 6 is separated from the separating area by 10 to 20 .mu.m.
However the photodiode tends to show the parasitic effect due to carrier formation by incident light, and requires a large margin for preventing such effect. Also the embedded layer 2 has to be much larger than the P-domain 5 in order to prevent the parasitic effect between the P-domain 5 and the substrate 1, and such structure results in an insufficient voltage resistance between the embedded layer 2 and the separating area 4.